This section allows you to configure the system based on the specific features of the installed chipset. This chipset manages bus speeds and access to system memory resources, such as DRAM and the external cache. It must be stated that these items should never need to be altered. The default settings have been
chosen because they provide the best operating conditions for your system. The only time you might consider making any changes would be if you discovered that data was being lost while using your system.
SDRAM CAS Latency Time
Default: 3
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing.
SDRAM Cycle 11 me Tra8ffrc
Default: 618
Select the number of SCLKs for an access cycle.
SDRAM RAS-to-CAS Delay
Default: 3
This field lets you insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stability. This field applies only when synchronous DRAM is installed in the system.
SDRAM HAS Precharge 11 me
Default: 3
If insufficient number of cycles are allowed for the RAS to accumulate its charge before DRAM refreshes, the refresh may be incomplete and the DRAM may fail to retain data. This field applies only when synchronous DRAM is installed in the system.
System BIOS Cacheable
Default: Enabled
Selecting Enabled allows caching of the system BIOS ROM at FOOO'Oh-FFFFFh, resulting in better system performance. However, if any program writes to this memory area, a system error may result.
Video BIOS Cacheable
Default: Enabled
Select Enabled allows caching of the video BIOS, resulting in better system performance. However, if any program writes to this memory area, a system error . may result.
Memory Hole AT 15M-16M
Default: Disabled
You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it cannot be cached. The user information of peripherals that ned to use this area of system memory usually disscuss their memmory requirements
Delayed Transaction
Default: Enabled
This chipset has an embedded 3 2~bit posted write buffer to support deadly transactions cycles. Select Enabled to support compliance with PCI specification version 2.1.
On-Chip Video Window Size
Default: 64MB
Select the on-chip video window size for VGA driver use.
Power-Supply Type
Default: A TX
Sets the power supply type used. Options are AT and ATX.
0 komentar:
Posting Komentar